This invention relates to further aspects of a particular method for operating a multiprocessor as a central control unit of a switching system. European patent application No. 141 245 discloses this kind of switching system. The error or defect detection for error protection of a dual processor module of such a processor can, for example, be accomplished in accordance with the European patent application No. 140 155. Both these European applications correspond to U.S. patent application Ser. No. 657,954 now U.S. Pat. No. 4,598,687 filed Sept. 19, 1984.
Such a central control unit must be extremely tolerant of errors, that is, errors or defects that occur, should be rapidly detected and defective as well as suspected elements, for example, processors of the central control unit, rapidly eliminated before additional errors result from the error or defect, which can affect the operation of the switching system. For that reason not only the processor unit, but the bus system and the memory blocks of the central memory are normally redundant or doubled in these central control units and protected against errors through precise synchronous parallel operation, apart from a possible tolerable timing slip between these "synchronous parallel" driven components.
Furthermore, such a central control unit, despite its extremely high error tolerance must also exhibit an extremely high availability, that is, any outage time or downtime of the entire central control unit must be limited to less than a few seconds or minutes per year despite uninterrupted operation. A failure in one of the central processors of the central control unit should almost never be allowed to result in a more or less extensive collapse of the switching operation.
An object of the present invention is to increase the reliability of the central processors utilized in central control units.
A primary object of the invention is, therefore, to insure a high degree of tolerance for errors by self testing of the processors and therewith, the maintenance of the actual uninhibited operation.
A further object of the invention is to raise the availability and reliability of the switching operations.